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Integrated circuit curriculum
Silicon Valley professionals explore ASIC, semiconductor, EDA, device, and integrated circuits in this program. You can pursue five tracks of study:
- Design Methodology
- Logic and Functional Design
- SystemVerilog and Verification
- Physical Design and Timing Closure
- Circuit Design
Learn hardware specification, logic design, verification, synthesis, physical implementation, circuit design, integrated circuit product testing, and the latest EDA tools on Linux in our VLSI Lab.
VLSI Engineering certificate program objectives
- Implement Verilog modeling of digital logic
- Write assertions for formal verification using SystemVerilog
- Build an advanced UVM verification environment
- Understand IO technologies such as PCI Express, Ethernet and Fibre Channel
- Complete practical designs with Xilinx FPGAs
Estimated Cost (You pay only for courses you enroll in): $5,800 | International Tuition Cost
Required Credits: Total Required: 5–7 courses/14 units. Take 2 of the 5 core courses (6 units) and 3–5 elective credit courses (8–9 units). End with certificate of completion review.
Duration: A full-time student can complete the certificate in 9–12 months.
Certificate Inquiry Form
Beginners should take introductory courses before advanced. If you are pursuing a professional certificate, it is recommended that you take at least one course from the Design Methodology track. Other courses can be taken based on your interests and professional levels. Here are the 5 tracks of study:
- Developing the Nanometer ASIC: From Spec to Silicon (2.0)
- Practical Design with Xilinx FPGAs (3.0)
Logic & Functional Design
- Digital Logic Design Using Verilog (CORE) (3.0)
- Practical DFT Concepts for ASICs: With Nanometer Test Enhancements (CORE) (3.0)
- IO Concepts and Protocols: PCI Express, Ethernet, and Fibre Channel (3.0)
- Digital Design with FPGA (3.0)
SystemVerilog & Verification
- SystemVerilog Essentials: Functional Verification and Simulation (1.5)
- SystemVerilog for ASIC and FPGA Design (3.0)
- SystemVerilog Assertions and Formal Verification, (3.0)
- Advanced Verification with SystemVerilog OOP Testbench,* (3.0)
- System and Functional Verification Using UVM (Universal Verification Methodology) (3.0)
Physical Design and Timing Closure
- Physical Design Flow From Netlist to GDSII (CORE) (3.0)
- ASIC Physical Design, Advanced (3.0)
- Timing Closure in IC Design (3.0)
- Low-Power Design of Nano-Scale Digital Circuits,(3.0)
- Analog IC Design, Introduction (CORE) (3.0)
- IO Design Fundamentals (3.0)
- Wireless Communications and Mobile Antenna Design, Introduction (3.0)
- Jitter Essentials (1.5)
- Comprehensive Signal and Power Integrity for High-Speed Digital Systems (3.0)
- Embedded System Hardware Architectures, Introduction (3.0)
- System Design for Low Power Management (1.0)
Some Engineering and Technology courses may be listed in more than one program. However, only one course may be shared between two E&T certificate programs unless otherwise noted.
To receive your certificate
You need a degree in a technical field or equivalent knowledge acquired through training and experience in hardware design and development. Experience with UNIX and/or LINUX is required for lab sessions. Knowledge of a programming language such as C, Perl or Bash Shell is helpful.
Please review course descriptions
Make sure you have taken necessary prerequisites or meet the requirements through job experience or previous education before registering for a course.
Certificate Program Chair
SAM HUYNH, Ph.D., MSEE, is a principal member of technical staff and a senior manager at AMD. He has over 18 years of experience in the field of VLSI design including memory, IO, physical design implementation and full chip integration. He has three patents and 10 publications. He earned a bachelor's and master's degree in Electrical Engineering with a focus on VLSI, and a doctorate in VLSI Mixed Signal Design and Test —all at the University of Washington. He teaches in the UCSC Silicon Valley Extension VLSI certificate program.
Certificate Program Advisory Committee
JEFFERY GOODING, MSEE
Account Technology Executive, Cadence Design Systems
SAM HUYNH, Ph.D., MSEE
Principal Member of Technical Staff, AMD
Instructor, VLSI Certificate Program, UCSC Silicon Valley Extension
Senior Manager, Applications Engineering, Synopsys Inc.
MANDAR MUNISHWAR, B.E.
Formal Verification Engineer, Google
Instructor, VLSI Certificate Program, UCSC Silicon Valley Extension
JOSE RENAU, Ph.D.
Professor, Computer Science and Engineering, Jack Baskin School of Engineering, UC Santa Cruz
Consultant, Esperanto Technologies, Inc.
BENJAMIN TING, M.S.E.E.
Principal Engineer, Micron Technology
Chair/Instructor, VLSI Certificate Program, UCSC Silicon Valley Extension
ARVIND VIDYARTHI, M.S.E.E.
Director, Global Physical Design Lead, Intel Corp.
You can enroll in a certificate program any time during your studies.
Once you create your student account, you can enroll in a certificate program. Although you can enroll in a program at any time, the benefit of enrolling early is that it locks in your certificate requirements. This means that even if program requirements change, the requirements to complete your certificate will remain the same for you.
- You must enroll in the certificate program before enrolling in the Certificate Completion Review.
You have a total of five years to complete all necessary courses in a certificate program.
All the necessary units in a certificate must be completed within a five-year window. The clock begins on the first day of your first course in the certificate program. For example, if you started a course on Sept. 5, 2017, you would have to complete all of the required units in this certificate by Sept. 4, 2022.
- Enrolling in a certificate program does not trigger the beginning of the five-year window. It begins the first day of the first course that applies to a certificate program.
- The Certificate Completion Review process does not have to occur within the five-year timeframe.
Please note that only letter grades of C- or higher may be applied to a certificate, and in some programs, students may have more stringent requirements. Students in most employer- and government-sponsored payment programs, such as workforce development, as well as international students on F-1 visas, need to maintain a B average to meet their requirements. Personal Financial Planning students have additional grade requirements for individual courses to attain a certificate.
See Grading and Credits Policy for further information.