Building Closed Memorial Day Weekend
The Silicon Valley Campus is closed Saturday, May 27 through Monday, May 29, 2023, in honor of Memorial Day. We will reopen for classes on Tuesday.
The course starts with the basic concepts of hardware description, then goes into the key Verilog language elements and data types. Students tackle key challenges and learn structural, dataflow and behavioral modeling in Verilog, including common constructs, considerations and coding examples. Instruction in the coding and testing of digital logic includes examples of combinational circuits (gates, mux/demux, encoders/decoders, and general Boolean expression), sequential circuits (various latches, flip-flops, shift registers, counters, RAMs and ROMs), and complex logic (flavors of ALU and FSM).
At the completion of the course, students are able to understand and implement Verilog modeling of basic digital logic. Ultimately, students write and simulate approximately 3000 lines of Verilog code. The synthesis and simulation of the test examples is done using freely downloadable tools with instructor guidance.
At the conclusion of the course, you should be able to
- Describe a solution to complex logic design problems and implement a test solution using Verilog
- Discuss how to implement a hardware solution through software
- Explain how to implement and test complex combinational logic, sequential logic, arithmetic circuit, memory, DSP and finite state machine
- Identify, debug and find a solution to an existing hardware problem
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