3D IC Packaging and Physical Verification | VLSI.X418

This course provides an in-depth exploration of the principles, techniques, and applications of three-dimensional integrated circuit (3D IC) packaging. 3D IC packaging is a cutting-edge technology that enables the stacking of multiple integrated circuits (ICs) within a single package, offering numerous advantages in terms of performance, power efficiency, and form factor.

The course begins with an introduction to the fundamentals of IC packaging, including various packaging technologies and their evolution. It then delves into the concepts and challenges associated with 3D IC packaging. Students will gain a comprehensive understanding of the design considerations, fabrication processes, and assembly techniques employed in 3D IC packaging. The course also covers topics like EMIR and has comprehensive physical verification in the areas of chip stacking.

Learning Outcomes
At the conclusion of the course, you should be able to

  • Describe the fundamentals of 3D IC packaging and analyze the benefits and challenges of 3D IC packaging
  • Identify different 3D IC packaging architectures and understand advanced packaging materials and processes
  • Discuss emerging trends and future directions in 3D IC packaging
  • Collaborate effectively in a multidisciplinary team(s)
  • Apply theoretical knowledge to practical applications

Skills Needed

Some familiarity with material science principles and a fundamental knowledge of semiconductor manufacturing processes.
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This course is related to the following programs:

Estimated Cost: TBD

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