VLSI and Semiconductor Engineering - image of a chip in bright colors
Certificate Program

VLSI and Semiconductor Engineering

Building the chips of tomorrow

Establish Candidacy View Individual Courses
Contact Us

Certificate Description

This program was formerly named VLSI Engineering.
   

   

Learn next-level VLSI design skills for top Silicon Valley companies

UCSC Silicon Valley Extension VLSI and Semiconductor Engineering professional certificate program provides students with the core design skills they need to work at top companies in the Valley. Both established and aspiring engineers develop new skills, gain insight into digital and analog design techniques and methodologies, and learn from our expert faculty.

Integrated circuit curriculum

You'll explore ASIC, semiconductor, EDA, device, and integrated circuits. In our VLSI lab, our instructors will give you the opportunity to get hands-on experience with hardware specification, logic design, verification, synthesis, physical implementation, circuit design, integrated circuit product testing, and the latest EDA tools on Linux.

Who are our students?

Logic designers, design for test professionals, verification engineers, and project leaders receive next-level training for career growth so they can meet the latest demands of top Silicon Valley employers.

Two tailored elective tracks

  • Track 1: Front-end Design
    For professionals pursuing careers in application-specific integrated circuits (ASIC) architectural definitions and logic designs for its implementation.
  • Track 2: Back-end Design
    For professionals interested in the physical implementations of ASIC designs from synthesis to silicon.

VLSI and Semiconductor Engineering certificate program objectives

  • Implement Verilog modeling of digital logic
  • Write assertions for formal verification using SystemVerilog
  • Build an advanced UVM verification environment
  • Understand and implement DFT concepts in an ASIC design
  • Complete practical designs with Xilinx FPGAs
  • Implement a design from RTL to GDS

Access to premier tools

Using premier industry tools from Cadence, OpenROAD, Siemens, and Synopsys, you’ll learn front-end and back-end ASIC design and leave the classroom ready to apply new skills at your job.

synopsys-300.jpg
Cadence_Logo_300px.jpg
siemens-2-300 copy.jpg
openroad-logo-2022.jpg
   

   
vlsi-careers-info-session-recording-300.jpg

Missed our recent info session about the semiconductor industry??

Learn more by watching our program chair talk about the industry and our certificate program in this recent webinar.

Program Overview

Estimated Cost: Track 1 starts at $4,350. | Track 2 starts at $4,620. (You pay only for courses you enroll in.) | International Tuition Cost
Program Requirements: 5 courses (minimum 14 quarter units). Take 3 required courses (9 quarter units) and 2 elective courses (minimum 6 quarter units). End with certificate of completion review.
Minimum Hours of Instruction: Minimum 150 hours of instruction.
Estimated Duration: A full-time student can complete the certificate in 9–12 months.
Special Programs:
International Logo Workforce Logo

Courses

Syllabus Library

1. Core Course(s): (Choose Three)

Fall TBD
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-11-2024 to 03-14-2024
$980.00
VLSI.X400.(21)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-08-2024 to 03-25-2024
$980.00
VLSI.X409.(11)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

10-03-2023 to 12-05-2023
$980.00
VLSI.X410.(25)

01-16-2024 to 03-19-2024
$980.00
VLSI.X410.(26)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-17-2024 to 03-20-2024
$980.00
VLSI.X411.(13)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me

2. Electives: Front-End

Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-13-2024 to 03-16-2024
$880.00
VLSI.X401.(14)
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

10-04-2023 to 12-13-2023
$980.00
VLSI.X404.(13)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Start / End Date
Cost
Instructor
Location
Section ID

01-10-2024 to 03-13-2024
$980.00
VLSI.X415.(1)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-18-2024 to 03-21-2024
$820.00
VLSI.X405.(14)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me

3. Electives: Back-End

Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-18-2024 to 03-21-2024
$980.00
EMBD.X400.(12)
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-18-2024 to 03-21-2024
$820.00
VLSI.X405.(14)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

01-19-2024 to 03-22-2024
$980.00
VLSI.X408.(11)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me

4. Completion Review:

Start / End Date
Cost
Instructor
Location
Section ID

Meet Our Instructors

Ajit A Natarajan
Sr. Software Engineer, Google
Arvind Vidyarthi
Sr. Dtr., Silicon Design Implementation/Methodology, Intel | Board Chair
Benjamin Ting
Principal Engineer, Micron Technology
Bharat Patel
Director/Technologist in the Programmable Solutions Group, Intel
Edison Fong
RF Engineer and Analog Engineer, Consultant
Gary Wallichs
Sr. Principal Eng/FPGA Product Architect, Intel
Ibrahim Delibalta
Sr. Director of SoC Design at Intel Corp.
Jagadeesh Vasudevamurthy
Software Engineer, Xilinx (AMD)
Jignesh Shah
Senior Principal Physical Design Engineer, SIMA.ai
Karthik Chandrasekar
Hardware Engineering Technical Lead, Cisco
Mandar M Munishwar
Formal Verification Engineer, Google
Mehrdad Peyvan
Senior Hardware Test Engineer Manager, Analog Devices
Michael A. Wang
Director of Business Development, ISSI Integrated Silicon Solution Inc.
Rajesh Y Pendurkar
Director of Engineering, Capgemini
Sam D Huynh
Principal Member of Technical Staff, AMD
Samit Mehrotra
Microarchitect, Intel Corp.
Shahrokh Shakouri
ASIC Backend Consultant Specialist, Bay Area Chip Design
Sudha Thiruvengadam Vasu
Top Lead for Custom Memory Test Chip Design, Meta
Yuchung M Wang
Director, Global Academic Program at Digi-Key Electronics

Certificate Inquiry Form

Contact Us
Speak to a student services representative.

Call (408) 861-3860

Envelope extension@ucsc.edu

Requisite Knowledge

Technical expertise

You need a degree in a technical field or equivalent knowledge acquired through training and experience in hardware design and development. Experience with UNIX and/or LINUX is required for lab sessions. Knowledge of a programming language such as C, Perl or Bash Shell is helpful.

Please review course descriptions

Make sure you have taken necessary prerequisites or meet the requirements through job experience or previous education before registering for a course.

Advisory Board

Arvind Vidyarthi, instructor

Certificate Program Chair

ARVIND VIDYARTHI, M.S.E.E., senior director of silicon design implementation and methodology at Intel, has 17+ years of industry experience in chip implementation in various major semiconductor companies such as Sun Microsystems, AMD, and Nvidia. He has successfully managed chip design tapeouts at Intel and is familiar with all major implementation tools and methodologies. He is passionate about ML/AI in physical design and timing closure for performance, power, and area (PPA) and turn-around-time improvement. He is an instructor and chair of the UCSC Silicon Valley Extension VLSI and Semiconductor Engineering certificate program since 2022.

Certificate Program Advisory Committee

JEFFERY GOODING, MSEE
Account Technology Executive, Cadence Design Systems

SAM HUYNH, Ph.D., MSEE
Principal Member of Technical Staff, AMD
Instructor, Semiconductor Certificate Program, UCSC Silicon Valley Extension

JIM SCHULTZ, B.S.
Product Marketing Manager, Digital Design Implementation, Synopsys Inc.

MANDAR MUNISHWAR, B.E.
Formal Verification Engineer, Google
Instructor, VLSI and Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

JOSE RENAU, Ph.D.
Professor, Computer Science and Engineering, Jack Baskin School of Engineering, UC Santa Cruz
Consultant, Esperanto Technologies, Inc.

BENJAMIN TING, M.S.E.E.
Principal Engineer, Micron Technology
Instructor, VLSI and Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

ARVIND VIDYARTHI, M.S.E.E.
Senior Director of Silicon Design Implementation/Methodology, Intel Corp.
Chair/Instructor, VLSI and Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

Establish Candidacy

Establish candidacy in a certificate or specialization

Once you create your student account, you can establish candidacy in a certificate or specialization program any time during your studies.

The benefits of enrolling early
  • Lock in your certificate requirements.This means that even if program requirements change, the requirements to complete your certificate will remain the same for you
  • Receive program updates
  • Set your intention
  • It’s free

To complete a program, you must enroll in the certificate program before enrolling in the Certificate Completion Review.

You have five years to complete all necessary courses in a certificate program or three years to finish up a specialization program.

All the necessary units in a certificate must be completed within this window.* The clock begins on the first day of your first course in the certificate program. For example, if you started a course on Sept. 5, 2017, you would have to complete all of the required units in this certificate by Sept. 4, 2022.

Note:

Enrolling in a certificate program does not trigger the beginning of the five-year window. It begins the first day of the first course that applies to a certificate program. The Certificate Completion Review process does not have to occur within the five-year timeframe.

For more information: How do I get my certificate or specialization?

* Students participating in a special program, such as workforce, international, Personal Financial Planning, or curriculum partner programs (such as GreenFig or CLS by Barbri) may have a shorter completion requirement.

Establish Candidacy

Grade Requirements

Please note that only letter grades of C or higher may be applied to a certificate, and in some programs, students may have more stringent requirements. Students in most employer- and government-sponsored payment programs, such as workforce development, as well as international students on F-1 visas, need to maintain a B average to meet their requirements. Personal Financial Planning students have additional grade requirements for individual courses to attain a certificate.

See Grading and Credits Policy for further information.