VLSI and Semiconductor Engineering - image of a chip in bright colors
Certificate Program

Silicon Chip Design & Semiconductor Engineering

Building the chips of tomorrow

Establish Candidacy View Individual Courses
Contact Us

Certificate Description

Formerly "VLSI and Semiconductor Engineering"
This newly branded certificate program reinforces our dedication to offering top-notch education in the ever-evolving realm of microchip design and semiconductor technology.
   

Learn next-level VLSI design skills for top Silicon Valley companies

UCSC Silicon Valley Extension Silicon Chip Design & Semiconductor Engineering professional certificate program provides students with the core design skills they need to work at top companies in the Valley. Both established and aspiring engineers develop new skills, gain insight into digital and analog design techniques and methodologies, and learn from our expert faculty.

Integrated circuit curriculum

You'll explore ASIC, semiconductor, EDA, device, and integrated circuits. In our VLSI lab, our instructors will give you the opportunity to get hands-on experience with hardware specification, logic design, verification, synthesis, physical implementation, circuit design, integrated circuit product testing, and the latest EDA tools on Linux.

Who are our students?

Logic designers, design for test professionals, verification engineers, and project leaders receive next-level training for career growth so they can meet the latest demands of top Silicon Valley employers.

Two tailored elective tracks

  • Track 1: Front-end Design
    For professionals pursuing careers in application-specific integrated circuits (ASIC) architectural definitions and logic designs for its implementation.
  • Track 2: Back-end Design
    For professionals interested in the physical implementations of ASIC designs from synthesis to silicon.

Silicon Chip Design & Semiconductor Engineering certificate program objectives

  • Implement Verilog modeling of digital logic
  • Write assertions for formal verification using SystemVerilog
  • Build an advanced UVM verification environment
  • Understand and implement DFT concepts in an ASIC design
  • Complete practical designs with Xilinx FPGAs
  • Implement a design from RTL to GDS

Access to premier tools

Using premier industry tools from Cadence, OpenROAD, Siemens, and Synopsys, you’ll learn front-end and back-end ASIC design and leave the classroom ready to apply new skills at your job.

synopsys-300.jpg
Cadence_Logo_300px.jpg
siemens-2-300 copy.jpg
openroad-300.jpg
   

Silicon Chip Design: A Growing Opportunity

Despite restricted hiring in many tech areas these days, the demand for skilled silicon chip design engineers is blossoming. Learn about the job outlook for VLSI chip designers, in particular, jobs involving microelectronic devices, such as microprocessors and memory chips, and skills to build a competitive resume. (JANUARY • 2023)

   

Program Overview

Estimated Cost: Track 1 starts at $4,350. | Track 2 starts at $4,620. (You pay only for courses you enroll in.) | International Tuition Cost
Program Requirements: 5 courses (minimum 14 quarter units). Take 3 required courses (9 quarter units) and 2 elective courses (minimum 6 quarter units). End with certificate of completion review.
Minimum Hours of Instruction: Minimum 150 hours of instruction.
Estimated Duration: A full-time student can complete the certificate in 9–12 months.
Special Programs:
International Logo Workforce Logo

Courses


1. Core Course(s): (Choose Three)

Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

04-09-2024 to 06-11-2024
$980.00
VLSI.X410.(27)
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me

2. Electives: Front-End

Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

05-04-2024 to 07-13-2024
$880.00
VLSI.X401.(15)
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

04-17-2024 to 06-26-2024
$980.00
VLSI.X404.(14)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

04-01-2024 to 06-10-2024
$820.00
EMBD.X415.(13)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

04-03-2024 to 06-12-2024
$950.00
EMBD.X406.(12)
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me

3. Electives: Back-End

Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

04-01-2024 to 06-10-2024
$980.00
VLSI.X402.(14)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

04-06-2024 to 06-15-2024
$980.00
VLSI.X403.(8)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID
Want to enroll or get the estimated cost of future sections? Notify Me
Quarter Units: 3.0
Start / End Date
Cost
Instructor
Location
Section ID

04-12-2024 to 06-14-2024
$980.00
VLSI.X414.(12)
See complete class schedule here.
Want to enroll or get the estimated cost of future sections? Notify Me

4. Completion Review:

Start / End Date
Cost
Instructor
Location
Section ID

None
$0.00

TBD

O-CE0186.(015)
Want to enroll or get the estimated cost of future sections? Notify Me
Start / End Date
Cost
Instructor
Location
Section ID

Meet Our Instructors

Ajit A Natarajan
Sr. Software Engineer, Google
Arvind Vidyarthi
Sr. Dtr., Silicon Design Implementation/Methodology, Intel | Board Chair
Ashkan Hashemi
Signal/Power Integrity Engineer, Amazon Lab126
Benjamin Ting
Principal Engineer, Microsoft
Bharat Patel
Director/Technologist in the Programmable Solutions Group, Intel
Edison Fong
RF Engineer and Analog Engineer, Consultant
Gary Wallichs
Sr. Principal Eng/FPGA Product Architect, Intel
Ibrahim Delibalta
Sr. Director of SoC Design at Intel Corp.
Jignesh Shah
Senior Principal Physical Design Engineer, SIMA.ai
Lavanya Aryasomayajula
Principal Engineer, onsemi
Mandar M Munishwar
Formal Verification Engineer, Google
Mehrdad Peyvan
Senior Application Manager, Analog Devices
Michael A. Wang
Director of Business Development, ISSI Integrated Silicon Solution Inc.
Rajesh Y Pendurkar
Director of Engineering, Capgemini
Sam D Huynh
Principal Member of Technical Staff, AMD
Samit Mehrotra
Microarchitect, Intel Corp.
Yuchung M Wang
Director, Global Academic Program at Digi-Key Electronics

Certificate Inquiry Form

Contact Us
Speak to a student services representative.

Call (408) 861-3860

Envelope extension@ucsc.edu

Requisite Knowledge

Technical expertise

You need a degree in a technical field or equivalent knowledge acquired through training and experience in hardware design and development. Experience with UNIX and/or LINUX is required for lab sessions. Knowledge of a programming language such as C, Perl or Bash Shell is helpful.

Please review course descriptions

Make sure you have taken necessary prerequisites or meet the requirements through job experience or previous education before registering for a course.

Advisory Board

Arvind Vidyarthi, instructor

Certificate Program Chair

ARVIND VIDYARTHI, M.S.E.E., senior director of silicon design implementation and methodology at Intel, has 17+ years of industry experience in chip implementation in various major semiconductor companies such as Sun Microsystems, AMD, and Nvidia. He has successfully managed chip design tapeouts at Intel and is familiar with all major implementation tools and methodologies. He is passionate about ML/AI in physical design and timing closure for performance, power, and area (PPA) and turn-around-time improvement. He is an instructor and has been chair of the UCSC Silicon Valley Extension Silicon Chip Design & Semiconductor Engineering certificate program since 2022.

Certificate Program Advisory Committee

JEFFERY GOODING, MSEE
Account Technology Executive, Cadence Design Systems

SAM HUYNH, Ph.D., MSEE
Principal Member of Technical Staff, AMD
Instructor, Silicon Chip Design & Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

JIM SCHULTZ, B.S.
Product Marketing Manager, Digital Design Implementation, Synopsys Inc.

MANDAR MUNISHWAR, B.E.
Formal Verification Engineer, Google
Instructor, Silicon Chip Design & Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

JOSE RENAU, Ph.D.
Professor, Computer Science and Engineering, Jack Baskin School of Engineering, UC Santa Cruz
Consultant, Esperanto Technologies, Inc.

BENJAMIN TING, M.S.E.E.
Principal Engineer, Micron Technology
Instructor, Silicon Chip Design & Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

ARVIND VIDYARTHI, M.S.E.E.
Senior Director of Silicon Design Implementation/Methodology, Intel Corp.
Chair/Instructor, Silicon Chip Design & Semiconductor Engineering Certificate Program, UCSC Silicon Valley Extension

Establish Candidacy

Who should establish candidacy?

  • People who are pursuing a certificate (and have enrolled in a course in the program).
  • People who want to lock in the current requirements of a certificate or specialization.
4 Simple Steps to a Certificate or Specialization
  1. Complete a course in your selected program.
  2. Establish candidacy. Click on the Establish Candidacy button on your program page.
  3. Take all required courses for certificate completion.
  4. Once your grades are posted on your final course, enroll in the certificate review fee.
A Benefit of Establishing Candidacy

Program requirements may change. Once you commit to a program by establish your candidacy, you will not have to change your plans to meet new requirements. They are locked in for you. Timeline: 4 years to get it done (or 3 for a specialization) You must complete all the necessary units in a certificate within a four-year window. The clock begins on the first day of your first course in the certificate program. For example, if you started a course on Sept. 5, 2023, you would have to finish by Sept. 4, 2027.

Note: Establishing candidacy does not trigger the beginning of the four-year window. It begins the first day of the first course in your chosen certificate program. The Certificate Completion Review process does not have to occur within the four-year timeframe.

Exceptions to the four-year requirement
  • If you Established candidacy prior to Jan. 1, 2024, you will have five years to complete a program.
  • Students participating in a special program, such as workforce, international, or our curriculum partner programs, such as the Legal Studies courses (CLS by Barbri) and sales and business courses (Ziplines Education) have shorter completion requirements.

Establish Candidacy

Grade Requirements

Please note that only letter grades of C or higher may be applied to a certificate, and in some programs, students may have more stringent requirements. Students in most employer- and government-sponsored payment programs, such as workforce development, as well as international students on F-1 visas, need to maintain a B average to meet their requirements. Personal Financial Planning students have additional grade requirements for individual courses to attain a certificate.

See Grading and Credits Policy for further information.