Instructor

Bharat Patel LinkedIn

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BHARAT PATEL, M.S.E.E, director of CAD and Physical Design in the Server IP Division at Intel, is a technologist in the Programmable Solutions Group. His primary responsibilities include physical design methodology and innovations and efficiency tasks in the design engineering team. In addition to Intel, his more than 25 years of professional experience in silicon design includes working for AMD and Broadcom. He has held multiple leadership roles including design automation and full chip integration lead, and more than 20 successful 20 tape-outs of leading microprocessors, servers, and ASICs using Intel and TSMC foundries. His proficiency in various chip design CAD flows and aspirations to mentor multi-disciplinary teams motivate him to learn, adapt, and train teams to solve complex chip design problems.

Associated Program(s)

Silicon Chip Design & Semiconductor Engineering

Physical Design Flow From Netlist to GDSII