About

JOANNA MAPEL, MS, is a field applications engineer at Avnet, where she provides technical guidance and strategic solutions to customers integrating AMD/Xilinx FPGA products into high-performance compute and embedded systems. With a background in FPGA and embedded systems engineering, she specializes in the design, verification, and deployment of high-reliability digital systems across aerospace, defense, and cutting-edge AI acceleration applications.

Mapel's passion lies at the intersection of signal processing, embedded systems, and hardware-accelerated machine learning. She recently focused on deploying real-time object detection pipelines on both GPU and FPGA platforms to enable next-generation intelligent systems.

She earned a Master's degree in Engineering from The Johns Hopkins University, and a bachelor's degree in Engineering from University of Pittsburgh. 

An advocate for innovative hardware design, she enjoys collaborating with engineers and researchers working on advanced compute architectures, AI at the edge, and mission-critical embedded platforms.

Joanna Mapel's courses currently open for enrollment

Practical Design with Xilinx FPGAs

EMBD.X408
$910
  • Flexible Attend in person or via Zoom at scheduled times.
Schedule
Date Start Time End Time Meeting Type Location
Mon, 06-15-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
Mon, 06-22-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
Mon, 06-29-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
Mon, 07-06-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
Mon, 07-13-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
Mon, 07-20-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
Mon, 07-27-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
Mon, 08-03-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
Mon, 08-10-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
Mon, 08-17-2026 6:30pm 9:30pm Flexible SANTA CLARA / REMOTE
 

This class meets simultaneously in a classroom and remotely via Zoom. Students are expected to attend and participate in the course, either in-person or remotely, during the days and times that are specified on the course schedule. Students attending remotely are also strongly encouraged to have their cameras on to get the most out of the remote learning experience. Students attending the class in-person are expected to bring a laptop to each class meeting.

To see all meeting dates, click "Full Schedule" below.

You will be granted access in Canvas to your course site and course materials approximately 24 hours prior to the published start date of the course.

Required Tools & Materials:
VHDL for Logic Synthesis, Authors: Andrew Rushton, Publisher: John Wiley & Sons, Publication Date: 2011-04-25, ISBN: 9780470688472

Students are required to purchase a Zynq-based board for their project (approximately $100, not included in the tuition). Detailed board information and instruction will be provided on the first night of class.

Recommended Texts:
The Verilog(R) Hardware Description Language, Authors: Donald Thomas, Philip Moorby, Publisher: Springer Science & Business Media, Publication Date: 2008-09-11, ISBN: 9780387853444

The Design Warrior's Guide to FPGAs, Authors: Clive Maxfield, Publisher: Elsevier, Publication Date: 2004-06-16, ISBN: 9780080477138