Arvind Vidyarthi

ARVIND VIDYARTHI, M.S.E.E. is vice president of Silicon Design Engineering at Altera, where he leads SoC and IP physical design implementation, methodology, and automation. With more than 25 years in the semiconductor industry, he has driven chip implementation across leading companies including Sun Microsystems, AMD, Nvidia, and Intel. His experience spans physical design, timing closure, static timing analysis, floor-planning, and place-and-route. At Intel he led global physical design and data-center AI design implementation, delivering multiple successful tape-outs on advanced process nodes.

A recognized expert across all major implementation tools and methodologies, Vidyarthi is passionate about applying ML/AI to chip design to advance performance, power, and area (PPA) and accelerate turn-around time. 

He holds master's degrees in Electrical Engineering from Tufts University and Binghamton University, and a B.Tech in Electronics Engineering from HBTI.

Beyond his work at Altera, Arvind has served since 2022 as chair of the UCSC Silicon Valley Extension Silicon Chip Design & Semiconductor Engineering program, where he also sits on the VLSI engineering advisory group and mentors the next generation of design engineers.