Course Description
Welcome to our immersive Semiconductor Design and Innovation workshop series. During these sessions you will be introduced to new and established tools that will help you create and manipulate content in new and powerful ways. Each session is led by an industry expert who will guide you through the material and share its real-world implications.
Topics
- The nature, history, and ongoing practices of RISC-V as a technology, and about RISC-V international organization
- RISC-V Architecture and Components
- Analyzing and modifying the RISC-V-core and memory hierarchy
As an open-source, extensible ISA, RISC-V is shaping the future of computing. The workshop introduces a commercial RISC-V system, covering theory, architecture, and technical aspects of the RISC-V ISA.
Students are required to bring laptops for class exercises
- Flexible Attend in person or via Zoom at scheduled times.
10/20/25: Workshop postponed. See full schedule for details.
This course is part of the Fall 2025 Workshop series.
This class meets simultaneously in a classroom and remotely via Zoom. Students are expected to attend and participate in the course, either in-person or remotely, during the days and times that are specified on the course schedule. Students attending remotely are also strongly encouraged to have their cameras on to get the most out of the remote learning experience. Students attending the class in-person are expected to bring a laptop to each class meeting.
To see all meeting dates, click "Full Schedule" below.
You will be granted access in Canvas to your course site and course materials approximately 24 hours prior to the published start date of the course.