This course starts with a comprehensive overview of signal and power integrity analysis for high-speed systems. The instructor promptly moves on to cover the state-of-the art modeling and analysis techniques used in high-speed links. The course introduces accurate interconnect modeling including high frequency and second-order effects, and behavioral modeling of IO and ESD, including IBIS. Students will learn the concepts of equalization design and various signaling techniques (such as differential, NRZ, pulse, multi-level, etc.). At the system level, topics include clocking schemes and timing jitter analysis, as well as power analysis topics such as IR Drop, AC noise, simultaneous switching noise, and decoupling capacitor. The course concludes with a discussion of variations in manufacturing and methods to handle them in simulation and design.
Upon completing the course, students will have a strong understanding of signal and power integrity concepts and terminology. They will acquire the skills to design, model, and analyze high-speed interconnects. They will be able to relate various link blocks and parameters to system performance and make trade off decisions.
- An introduction to signal and power integrity in high-speed system design
- Modeling and analysis of passive components
- I/O driver and receiver modeling
- Signaling techniques
- High-speed link statistical simulation methods
- Clocking schemes
- Timing jitter and noise
- Power supply analysis
- Modeling and analysis of process and manufacturing variations
Skills Needed: Students must have a basic understanding of signal integrity, electromagnetic compatibility, printed circuit boards or packages.